Computer history at the LEOK: the Ferranti FM1600 system
Source: “Digital Equipment Modules For Naval Systems” (Ferranti, 1965 ?) [*]
The FERRANTI FM1600 CPU was designed for use in large centralised computer installations in major warships and was at the time when the brochure came out the most powerful in the Ferranti range. It is a 24-bit general-purpose, real-time central processor and is an integrated circuit version of the F1600 machine, which has been in service with the (UK) Royal Navy for many years and uses the same range of proven software.
The FM1600B was used in much military equipment, especially on board of ships of the UK Royal Navy, other Navy’s as well as in trainers, for instance in the Netherlands AA Tank Training System (Mech LUA).
FM1600B SYSTEM DESCRIPTION
Its very high speed (basic arithmetic functions of 3-address orders in 1.33 microseconds) and its many special features (including self-checking) made it especially suitable for these applications, either singly or in multi-computer installations. The highly efficient Hermes F1600 3-address order code was used, as proved in earlier machines. The FM1600B was designed to work with core stores having cycle times down to l microseconds in amounts up to 262,000 words of 24 bits. Its own 1,024 words 80-bit micro-program store controlled basic computer operations as defined by the order code. The store could also provide extra order codes, input/output routines and extensive self-test facilities.
The CPU was engineered as a 3-shelf module containing 82 PECs. The front panel hinged for easy access and carries extensive monitoring facilities.
In systems where computers communicate directly with their peripherals a large amount of computer time is spent on organising peripheral data transfers. In Ferranti systems, a Computer interrupt Equipment (CIE) was used to control the interface and organised and handled all transfers of data between the CPU and the peripheral control units (PCUs) in the appropriate order of priority. When necessary it also allowed the PCUs access to the core store with a minimum of computer control. Data transfers were effectuated by a ‘handshake’ technique which was part of the Standard Interface procedure common to all 1600 series systems and which became now standard for all UK Ministry of Defence computer systems. The use of a Standard Interface permitted all peripheral control units to be designed to a common doctrine, giving great flexibility in system design by avoiding the need to design special interface logic to permit each PCU to communicate with the CPU. The CIE also controlled the relative priority of PCU requests for data transfers to the CPU. In a multi-computer centralised system, each computer’s CIE was connected to each peripheral’s PCU, so that any peripheral could be operated with any computer in a reduced working mode.
The CIE was engineered as a three-shelf equipment and was fitted with PECs appropriate to the system input-output channel requirements. It was tested by using the micro-program facility built into the CPU. The CIE could accommodate up to 56 Standard Interface channels each PCU typically requiring one channel.
FM 1600 SERIES MODULES
These modules were used in conjunction with the FM 1600 and FM 1600B computers. There was a large number of different modules all of which are electronically and mechanically compatible giving great flexibility for system design and, if required, subsequent system expansion or variation.
Previously, module commonality has been restricted by differing data formats between peripheral equipment, and consequently, computer systems were engineered for a particular application and offered limited options. With the adoption of the Ferranti B Standard Interface procedure, these restrictions were eliminated. Data transfers to and from peripherals were made via peripheral control units (PCU) which converted the data into a standard form. Transfers to and from the computer were thus in a common language. Peripheral equipment could be added to or subtracted from the system as required.
Each peripheral equipment operated independently and only requested a data link with the computer when necessary. The problem of simultaneous requests to the computer by more than one peripheral was resolved by a pre-determined priority designed into the system. This precedence was set by giving a control channel allocation to each peripheral, channel 0 having the highest priority, channel 1 the next highest, etc.<
All the modules had a similar mechanical construction and all fit into a shelf or part shelf space in a standard cabinet. The electronic elements in each module were carried on plug-in electronic circuit panels (PECs). The modules had hinged front panels providing access to the PECs to facilitate maintenance which was based on repair by panel replacement.
Although the modules were designed as independent items they employ the same technology, form of construction, and computer/PCU interface so that they could be used together without adaptation in a wide variety of different system combinations, thus giving economy in spares, test equipment, documentation and training.
In FM 1600 series systems the term ‘computer’ was often be used to refer collectively to the central processor unit (CPU), its associated core store, and the computer interrupt-driven equipment (CIE).
The FM1600B Central Processor Unit (CPU)
The FM1600B was a compact basic version of the FM 1600 developed to provide a suitable computer for use in smaller and more economical systems. Using the same instruction code as the FM1600, it could be employed with the same range of peripheral control units as it was engineered in the same for. The CPU had been reduced, by advanced design techniques, to only 19 electronic circuit packages occupying less than one standard shelf. This reduction in size (and cost) was not accompanied by a corresponding reduction in computing power. With a l microsecond cycle-time core store the speed of the FM 1600B was better than half that of the larger machine, and the difference could be further reduced by using 650 nanosecond stores. Maximum store size is 65,536 words of 24 bits.
For smaller systems, the CPU module could accommodate a store interface and a 1-microsecond store of 4,096 words. A further 4,096 words could be housed in the associated CIE module. This combination provided an exceptionally compact system. For systems with greater store requirements, the core store and interface were available as separate modules with a choice of speeds.
The CPU occupied one shelf of a standard cabinet. Control and monitoring facilities could be carried on the units front panel – or, alternatively, made available at a remote desk.
FM1600B Computer interrupt Equipment (CIE)
Two versions of the CIE module were available. The first provides up to 22 standard interface control channels and occupied a full shelf space in a standard cabinet. The second provided up to 12 standard interface control channels and also occupied a full shelf space, but had sufficient space within the module for the installation of a 4,096-word large 1-microsecond store if required.
Programmer’s control and monitoring facilities were provided at a remote desk. If the desk was not required an alternative programmer’s panel was fitted to the front of the module.
Very fast response to requests for data transfers from peripheral units was a vital feature of real-time systems in order to allow units, such as radars, to be utilised within the necessary time. Typical peripheral response times in FM1600B systems were in the order of two to 3 microseconds.
In a real-time system, virtually all the system programs and data must be available for immediate access when required. As a result, it is normal to find that regenerative core storage forms the whole, or at least the greater part, of the store involved in such systems, and that additional stores, such as drums, discs or magnetic tape stores, play only a relatively minor part.
The cost of core storage in a typical real-time computer system is considerably greater than that of the computer itself. It is, therefore, particularly significant that efficient use should be made of this storage. The 24-bit word length chosen for 1600 series computers was found to be the most suitable for storing naval system data with the required precision. Similarly, the 24-bit 3-address order structure developed for the 1600 series had proved exceptionally economical for program storage when compared with single-address systems.
The FM 1600 computer could be used in naval systems either with the Ferranti 1 microsecond cycle-time core-store or with the Plessey 1 microsecond (nominal) core store available in 16K or 32K word units. The FM1600B was used with Ferranti 1 microsecond core store or, more usually, with Ferranti 650 nsec core store.
The fast access 650 nsec core store provided a general-purpose destructive readout and was built up from modules. Each module provided 16,384 words of 26 bits and also contained associated interface logic. A maximum of four modules could be assembled providing a total capacity of 65,536 words of 26 bits. Each module occupied a space 1/3 shelf wide by 3 shelves high, therefore 3 modules may be located side by side in two shelves of a standard cabinet, giving a 48K store. If the full 64K store was required the 4th module could be located alongside the first three in an adjacent cabinet. If this store was used for the FM1600B computer then the full power of the system could be realised. The cost (per word) of this store was less than for the 1-microsecond store as larger units were used.
The 1-microsecond cycle-time core-store provided a general-purpose destructive readout and was built up from units. Each unit provided 4,096 words of 26 bits and also contained associated circuitry. A maximum of 16 units could be assembled providing a total capacity of 65,536 words of 26 bits. Two 4K units could be accommodated in a module occupying a 1/3 shelf space. The associated external store interface was also contained in a 1/3 shelf module. In the case of the FM1600B system using a 12 channel CIE a 4K store could be accommodated in the CPU module and another 4K store in the CIE module, giving a total capacity of 8,192 words.
READER/PUNCH CONTROL UNIT
The simplest and cheapest method of storing data (at that time) was by means of punched paper tape. Tapes were prepared on a special type of typewriter and were read-in directly from such a device or, more rapidly, by using a paper-tape reader. In most installations, the tape reader would normally be used to reload the computer after a period of shut down or maintenance. Data tapes (e.g. of IFF codes or meteorological data) could also be prepared at the keyboard. An online “page-printer” could be used to give a direct output of computer data. This was, however, a relatively slow process. The more usual procedure was to use a paper-tape punch to produce larger volumes of data, and to print these “off-line” later to produce typewritten records. The punch was used during program proving and maintenance to check system operation, and could also be used during operational running to produce records for subsequent analysis.
Both the tape reader and tape punch were controlled by the Reader/Punch Control Unit. This unit organised transfers from the tape reader to the computer and also transferred from the computer to the tape punch. Two Standard Interface channels were used, one for each peripheral.
The Reader/Punch Control Unit was engineered as a four or six PEC backboard section kit, and normally shared a half shelf module with another PCU which did not require all the space available. Fault indicators and control switches formed part of the kit, and these were mounted on the common front panel.
PAGE PRINTER CONTROL UNIT
The Page Printer Control Unit was designed to control transfers between a single computer and a typewriter keyboard input device with an output page printer. The peripheral could also have paper tape reading and punching facilities as an alternative method of input and output. Transfers to and from the computer were in 8-bit characters conforming to a modified ISO code, with even parity. Up to ten characters per second could be transferred.
The Page Printer Control Unit was engineered as a four PEC backboard section kit, normally containing one PCU but can contain two independent page printer PCUs. This kit was normally mounted together with other PCUs in a full shelf or half shelf module. A Transfer Fail Lamp and Reset switch were fitted to the front panel, and a remote Reset switch could be fitted to the operator’s desk if required.
MAGNETIC TAPE CONTROL UNIT
Magnetic tape decks had only limited use in sea-going systems, as computer programs and data had to be available with access times far shorter than magnetic tape systems permitted. Military versions of magnetic tape storage decks did exist, however, and were fitted in most of the larger seagoing systems.
Magnetic tape provided a much more compact form of storage than paper tape, and also permitted data to be read in or recorded at much higher rates. It was thus valuable for situations where large quantities of programs or data had to be loaded quickly (e.g. when changing to a reduced mode in a multi-computer system) or for recording large quantities of data at high rates either for trial purposes or for operational records.
The Magnetic Tape Control Unit was designed to control a single tape deck or one master deck and a maximum of three slave decks from one or two computers. Data words from the computers were converted into a series of 6-bit characters with an odd parity bit added, and written on to the tape in IBM compatible format subject to the restriction that writing must be in multiples of four characters. Characters read from the decks were re-assembled into words for transfer to a computer.
This unit was a full shelf module with an integral front control panel with switches and indicator lights.
* Some years later, the title of this brochure would have been quite confusing as the Digital Equipment Corporation (DEC) gained ground.
A pdf copy of a Ferranti 1600B-leaflet can be found at the library of the University of Pisa.