Digital Technologies: SC/MP (1977)
SC/MP-based microcomputer for data acquisition
In 1977 when the first type microprocessors became available on the market, TNO started to investigate the possibilities for using these devices for measuring physical phenomena and collecting data. The first microprocessor we experimented with was a SC/MP or ISP.8A/600D. The microprocessor was produced by National Semiconductors (nowadays Texas Instruments) with impressive specifications 4 MHz processor and 64 kB memory.
The OEM product information of the SC/MP we received consisted of:
- A description of the SC/MP microprocessor,
- A leaflet about the benefits of using the SC/MP microprocessor and applications,
- Description of the Input/Output signals of the microprocessor,
- A functional description of the SC/MP microprocessor, and
- A guide to operating the SC/MP microprocessor.
With the aid of an article from Dan Grove, a microcomputer instructor from Santa Clara, a microcomputer was developed to perform control and data acquisition experiments at TNO.
Hardware setup for the SC/MP microcomputer
In a non-standard case with a 220 V connection and a 5V DC converter, we installed a 12 by 15 cm wire-wrap board. On the board with socket pins, we mounted Integrated-Circuit (IC) connectors. The SC/MP processor required a 40-pin wire-wrap IC connector. Two 256 words of 4-bit Random Access Memory (RAM) were available to the user program(s). The Operating System (OS), a program to control the microcomputer, was burnt into three Read Only Memory (ROM) chips of 32 8-bit words each. Note that memory was expensive at that time (the minimising of memory use caused the later millennium problems).
The wire-wrap connections were either made with a manual wrapping tool or an electric battery-operated tool. Wire-wrapping meant: an insulated solid copper core wire was stripped for one-and-a-half to two centimetres and wrapped around a square socket pin. The microcomputer, the memory ICs, the control electronics, and the input- and output circuitry were all mounted on the wire-wrap board. The wire-wrap connections were gas-tight; all wire-wrapped connections still operate flawlessly.
The 8-bit parallel data input for the microcomputer was performed by eight switches and a load-data push-button on the front panel of the microcomputer. The output to the user occurred using eight LEDs on the panel.
The execution of a user program by the microprocessor system could be affected by four operating switches on the operations panel:
- INIT/ABORT: A push button halts the execution of the program initialises the microprocessor, and resets the program counter to zero.
- PROG HALT switch: If a HALT instruction was programmed, the instruction was recognised and the execution of the program topped but could be activated again using the RUN-switch
- SINGLE INSTR switch: If switched ON (to the side of the printed text), the execution of a user program advanced one instruction each time the RUN button was pushed.
- RUN: After every break in the execution of a program (by the INIT/ABORT switch, after a HALT action, or by the SINGLE INSTRUCTION function), the internal ROM program (Operating system) or the execution of the user program continued.
At the upper centre of the diagram, the eight output LEDs are shown. They were addressed by the address lines AD08 and AD09. The signal-line WDS (Write Strobe Output) is displayed below the diodes. The eight data-input switches with buffers to prevent rumbling inputs can be found on the left side of the scheme.
The ROM ‘operating system’ program which reads actions from the operations’ panel
| Object code | Mnemonic | Description | |
|---|---|---|---|
| .TITLE PANEL | |||
| 08 | NOP | No operation | |
| C401 | LDI 1 | ACCumulator-register=1 (Address switches) | |
| 37 | XPAH 3 | Put this (1) into pointer register 3 High | |
| C403 | LDI 3 | ACCumulator-register 3 | |
| 31 | XPAL 1 | Put this (3) into pointer register 1 Low | |
| C403 | LDI 3 | ACCumulator- register 3 | |
| 01 | XAE | Exchange (3 words to fetch) with Extension Register | |
| 06 | TEST: | CSA | ACCumulator=switch LOAD DATA (SR) |
| D420 | ANI X’20 | AND this with 20HEX | |
| 98FB | JZ TEST | Loop TEST, if the switch is not served (value=0) | |
| 06 | WAIT: | CSA | ACCumulator=switch LOAD DATA (SR) |
| D420 | ANI X’20 | AND this with 20HEX | |
| 9CFB | JNZ WAIT | Loop until the switch is released (value#0) | |
| 31 | XPAL 1 | ACCumulator=0 | |
| 982B | JZ LDDATA | Fetch 8-bit data (word) from switches | |
| 31 | XPAL 1 | Exchange Pointer-Register 1 Low | |
| C403 | LDI 3 | ||
| 60 | XRE | OR with ACCumulator=3 | |
| 980A | JZ STHI | Store first word | |
| C402 | LDI 2 | ||
| 60 | XRE | OR with ACCumulator=2 | |
| 980D | JZ STLO | Store second word | |
| C401 | LDI 1 | ||
| 60 | XRE | OR with ACCumulator=1 | |
| 9813 | JZ CNT | ||
| C300 | STHI: | LD (3) | Read Servicepanel (switches) |
| 36 | XPAH 2 | for RAM address to pointer 2 High | |
| C402 | LDI 2 | Initialise a second word to fetch | |
| 01 | XAE | ||
| 90DB | JMP TEST | ||
| C300 | STLO: | LD (3) | Read Servicepanel (switches) |
| 32 | XPAL 2 | for address within RAM to pointer Low | |
| C300 | LD (3) | ||
| 35 | XPAH 1 | and to pointer 1 High | |
| C401 | LDI 1 | ||
| 01 | XAE | ||
| 90D0 | JMP TEST | Fetch third word (8-bits) | |
| C400 | CNT: | LDI 0 | Initialize fetching of user-program |
| 31 | XPAL 1 | ||
| C300 | LD (3) | Fetch number of words user-program | |
| 01 | XAE | ||
| 90C8 | JMP TEST | ||
| 31 | LDDATA: | XPAL 1 | |
| C300 | LD(3) | Fetch data from switches | |
| CE01 | ST @ 1 (2) | Store data into RAM (pointed by 2) | |
| C4FF | LDI -1 | ACCumulator= -1 | |
| 02 | CCL | CY/L flag is cleared in Status Register | |
| 70 | ADE | ACC=ACC+E+CY/L (algebraically) | |
| 9803 | JZ EXC | All data for the user-program fetched; execute it |
|
| 01 | XAE | ||
| 90BA | JMP TEST | ||
| 35 | EXC: | XPAH 1 | Restore the start address of the user-program |
| 32 | XPAL 2 | within RAM into pointer 2 Low | |
| 9200 | JMP (2) | Start program | |
| .END | |||
| ACC=Accumulator, E=Extension Register CY/L flag = Carry/Link flag in Status Register |
An example program: a counter
| Mnemonic | Object code | Description |
|---|---|---|
| NOP | 08 | No operation |
| LDI 3 | C4 | Initialize RAM pointer (3) by |
| 03 | exchanging ACCumulator and | |
| XPAH 1 | 35 | Pointer 1-High (one of three) |
| LDI 0 | C4 | Start with value: zero |
| 00 | ||
| ST COUNT | C8 | in COUNT (RAM address) |
| 09 | ||
| LOOP: ILD COUNT | A8 | COUNT = COUNT + 1 |
| 07 | ||
| ST @ 0 (1) | C9 | Show this value (1) on LED |
| 00 | display (indirectly from COUNT) | |
| DLY: FF | 8F | Wait maximum delay time FF |
| FF | (delay instruction DLY) | |
| JMP LOOP | 90 | Jump back to LOOP |
| F8 | Increment value in COUNT | |
| address of COUNT | . COUNT |